Bandgap voltage references and temperature dependent or temperature independent bias current generators are widely used in integrated circuits and have application in both bipolar and CMOS processes. Ultimately it will be understood that any bandgap based voltage or current generator provides for a combination of a Proportional To Absolute Temperature (PTAT) signal with a Complementary To Absolute Temperature (CTAT) signal. In bandgap voltage reference a base-emitter voltage of a bipolar transistor (which is CTAT) is added to a PTAT voltage generated from a base-emitter voltage difference of at least two bipolar transistors operating at different collector current density. In constant current generators or in current mode bandgap voltage generators two currents, one of the form of a PTAT current and one of the form of a CTAT current, are combined to generate a desired output current or voltage. In the design of such circuits operation at low power supply is desired.
An example of a known low voltage bandgap voltage reference implemented in CMOS process is presented in FIG. 1. It includes three substrate bipolar transistors, Q1, Q2, Q3 four PMOS transistors, M1, M2, M3, M4, two NMOS transistors, M5, M6, one amplifier, A, and two resistors, R1, R2. The amplifier A effects a forcing of the common gate of M1 to M4 such that its two inputs have substantially the same voltage which is the base-emitter voltage of bipolar transistor operating at lower current density, Q2. As the bipolar transistors coupled to each of the two input terminals of the amplifier are operable at different current densities, abase emitter voltage difference ΔVbe is generated. This base-emitter voltage difference ΔVbe between the bipolar transistors Q1 and Q2 is reflected across R1 which is coupled between the non-inverting terminal of the amplifier and Q1. The base emitter voltage of Q1 provides a base emitter voltage Vbe. Thus, the reference voltage at the output node Vref is a combination of the ΔVbe across R1 and the Vbe of Q1. The circuit of FIG. 1 implemented in a typical submicron CMOS process can operate at a supply voltage of less than 1.5V. It can generate both a voltage reference and PTAT current reference.
Another example of a known prior art circuit configured to generate a constant current or with a predetermined temperature output voltage or current is presented in FIG. 2. The circuit of FIG. 2 is based on two bipolar transistors; a first QP1, operating with high current density, and the second, QP2, operating with low current density. Their base-emitter voltage difference ΔVbe, which is a signal of the form of a proportional to absolute temperature PTAT signal, is reflected across a resistor R3 coupled between QP2 and the inverting terminal of the operational amplifier, A1. As the amplifier A1 operably controls its two inputs to be at substantially the same voltage level and similarly to the circuit of FIG. 1, the input to the amplifier A1 has a voltage level corresponding to the base-emitter voltage Vbe of the bipolar transistor QP1 operating with higher base-emitter voltage. This has a form of a complementary to absolute temperature, CTAT, signal. The drains of the two PMOS transistors MP2, MP3 are each coupled to a corresponding one of the inverting and non-inverting terminals of the amplifier A1. Each PMOS transistor MP2 and MP3 have substantially identical aspect ratios W/L and have their gates coupled to ground which results in the drains currents being PTAT in nature. A second amplifier A2 is provided having its inverting terminal coupled to the non-inverting terminal of the first amplifier A1. A feedback path from the second amplifier A2 is coupled to each of the MOS devices MP2, MP3 and forms a common summing node “f”. At the summing node “f” three currents are summed together, two PTAT currents, from MP2 and MP3,respectively, and one CTAT current, as the second amplifier A2 operably forces the base-emitter voltage across a resistor R4 via MOS device MP6, provided at the output of the amplifier A2. As a result the current via PMOS transistor MP1 has a temperature dependence relating to the mixture of PTAT and CTAT currents. While the circuit of FIG. 1 operates at a lower supply voltage to the circuit of FIG. 2, it suffers in that it can generate only PTAT currents. The circuit of FIG. 2 is operable to generate a current with desired temperature behaviour but requires a larger supply voltage compared to the circuit of FIG. 1 as the PMOS transistor MP1 forms a cascoded arrangement with each of PMOS transistors MP2 and MP3. Similarly, MP4 and MP5 are in a cascoded arrangement. It will be appreciated by those skilled in the art that transistors in a cascoded arrangement requires a high biasing voltage than an uncascoded arrangement.
There is therefore a need for a circuit that can operate in lower voltage supply environments but yet has a desired temperature behaviour.